Application specific configuration of a fault-tolerant NoC architecture

This paper discusses the configuration of a fault-tolerant mesh-based NoC architecture. In this architecture, spare links provide a mechanism for rerouting data packets in presence of NoC faults. Two algorithms, exhaustive and greedy, are used to find the best configuration. The NoC is modeled at the high transaction level using SystemC TLM. This enables easy design space exploration and performance analysis of the proposed NoC architecture. The performance results driven from simulation of this model are used as the input of the spare link selection algorithms.