Implementation of a multisensor receiver for DS-CDMA applications

Author

Crand, S. ; Diouris, J.F. ; Bakowski, P.

Author_Institution

IRESTE, CNRS, Nantes, France

Volume

1

fYear

1996

fDate

3-6 Nov. 1996

Firstpage

658

Abstract

This paper presents a complete flow of computer aided design process starting from functional level description and ending at circuit level. The main interest of this study is to show the possibility to rapidly implement a DSP algorithm in a specific circuit by using high-level synthesis techniques. The implementation of a multisensor receiver for DS-CDMA applications is reported to show the effectiveness of the method and of the developed tool.

Keywords

circuit CAD; code division multiple access; digital radio; field programmable gate arrays; high level synthesis; land mobile radio; pseudonoise codes; radio receivers; signal processing; spread spectrum communication; ASIC; DS-CDMA applications; DSP algorithm; FPGA; circuit level; digital mobile radio communications; functional level description; high-level synthesis techniques; multisensor receiver; Algorithm design and analysis; Circuit synthesis; Costs; Digital signal processing; High level synthesis; Integrated circuit interconnections; Libraries; Multiaccess communication; Resource management; Signal processing algorithms;

fLanguage

English

Publisher

ieee

Conference_Titel

Signals, Systems and Computers, 1996. Conference Record of the Thirtieth Asilomar Conference on

Conference_Location

Pacific Grove, CA, USA

ISSN

1058-6393

Print_ISBN

0-8186-7646-9

Type

conf

DOI

10.1109/ACSSC.1996.601130

Filename

601130