Title :
Linear radio frequency power detector
Author :
Shieh, Ming-Liang ; Lai, Wei-Ju ; Li, Jin-Shun ; Chiang, Yen-Lung ; Wu, Han-Hsin ; Xsieh, Chin-Chung ; Tu, Chih-Ho ; Chen, Sheng-Wen ; Wu, Janne-Wha
Author_Institution :
Dept. of Electr. Eng., Nat. Chung Cheng Univ., Chiayi, Taiwan
Abstract :
In this paper, a design for high dynamic range applicable of power detector by using successive detection logarithmic amplifier (SDLA) configuration consists of PMOS load limiting amplifier and unbalanced source-coupled pairs. This device was been fabricated by TSMC 0.18-¿m 1P6M CMOS process. The experimental results show that the dynamic range of the power detector the frequency 900-MHz is almost kept at 39-dB and for frequency 1800-MHz, the dynamic range is 29-dB. Its log-error is kept at ±1-dB and consumes is 16-mW from a 1.8-V supply.
Keywords :
CMOS integrated circuits; UHF amplifiers; UHF integrated circuits; detector circuits; PMOS load limiting amplifier; TSMC 1P6M CMOS process; frequency 1800 MHz; frequency 900 MHz; linear radio frequency power detector; power 16 mW; size 0.18 mum; successive detection logarithmic amplifier; unbalanced source-coupled pairs; voltage 1.8 V; Communication system control; Detectors; Dynamic range; Power amplifiers; Power control; Power generation; Radio control; Radio frequency; Radiofrequency amplifiers; Rectifiers; SDLA; limiting amplifier; power control; power detector; successive detection logarithmic amplifier; unbalanced source-coupled pairs;
Conference_Titel :
Microwave Conference, 2009. APMC 2009. Asia Pacific
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-2801-4
Electronic_ISBN :
978-1-4244-2802-1
DOI :
10.1109/APMC.2009.5385446
