DocumentCode
3188591
Title
A CMOS Fully Differential Σ - Δ A Frequency Synthesizer for 2-Mb/s GMSK Modulation
Author
Li Zhang ; Jinke Yao ; Ende Wu ; Baoyong Chi ; Zhihua Wang ; Hongyi Chen
Author_Institution
Institute of Microelectronics, Tsinghua University, Beijing, China
fYear
2005
fDate
13-15 Dec. 2005
Firstpage
6
Lastpage
9
Abstract
A CMOS fully-differential 2.4-GHz Σ-Δ frequency synthesizer for Gaussian Minimum Shift Keying (GMSK) modulation is presented in this paper. The pre-compensation fractional-N PLL is adopted in the modulator. The designed circuits are simulated in a 0.18μm 1P6M CMOS process. The power consumption of the PLL is about 11-mW and the data rate of the modulator can get to 2-Mbits/s.
Keywords
Bandwidth; Circuits; Digital modulation; Energy consumption; Filters; Frequency synthesizers; Phase frequency detector; Phase locked loops; Transfer functions; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics, 2005. ICM 2005. The 17th International Conference on
Conference_Location
Islamabad, Pakistan
Print_ISBN
0-7803-9262-0
Type
conf
DOI
10.1109/ICM.2005.1590026
Filename
1590026
Link To Document