A switched-current sample and hold circuit for low frequency applications

Author

Mendes, E.de L. ; Loumeau, Patrick ; Naviner, Jean-François

Author_Institution

Ecole Nat. Superieure des Telecommun., Paris, France

Volume

3

fYear

2001

fDate

2001

Firstpage

2062

Abstract

A sample and hold circuit using the 0.6 μm technology for low frequency application is presented. This circuit is based on a specific memory base cell that reduces the error caused by the output conductance. It works with a 3.3 V supply voltage, offers high-resolution and low power dissipation. Simulations results presented a -77.6 dB harmonic distortion and a 1.98 mW power dissipation for a 100 μA biasing current, a 1.28 MHz sampling frequency, and a 10 kHz frequency input signal

Keywords

CMOS analogue integrated circuits; circuit simulation; harmonic distortion; integrated circuit noise; low-power electronics; sample and hold circuits; switched current circuits; 10 kHz; 3.3 V; CMOS switches; feedback loop; flicker noise; harmonic distortion; high-resolution; low frequency applications; low power dissipation; memory base cell; output conductance induced error; simulation; switched-current sample and hold circuit; thermal noise; transfer function; 1f noise; Capacitors; Circuit noise; Circuit simulation; Frequency; Low voltage; Power dissipation; Switches; Switching circuits; Transfer functions;

fLanguage

English

Publisher

ieee

Conference_Titel

Instrumentation and Measurement Technology Conference, 2001. IMTC 2001. Proceedings of the 18th IEEE

Conference_Location

Budapest

ISSN

1091-5281

Print_ISBN

0-7803-6646-8

Type

conf

DOI

10.1109/IMTC.2001.929560

Filename

929560