Energy-Aware Source-to-Source Transformations for a VLIW DSP Processor

Despite heavy focus on energy optimization at circuit and technology level, the contribution of computational and data intensive applications to this consumption cannot be ignored. In this paper, key trade-offs are analyzed in energy, speed as well as size. We present an architectural-based energy macro-modeling at application level as well as an optimization methodology for high performance VLIW processors. Our methodology is mainly based on the application of successive energy-cost guarded source-to-source transformations. The experimental evaluation of the proposed approach results into better exploitation of functional units, memory hierarchy and highway usage of the target processor. The advantages of the proposed interactive code transformation approach are two-folds. First, effort in optimization is spent only when the program measurement (transformation cost) determines that the effort is necessary and potentially beneficial, and only on those portions of the program where the energy/cycle performance payoff appears to be high. Second, by concatenating subsequent energy/cycle profile-driven low level transformations for higher level manipulations, the system will provide the programmer with a powerful toolset. The approach is illustrated using functional unit usage within a VLIW architecture. The newly proposed operation rebinding technique for low power improves energy dissipation up to 30% and CPU performance up to 75% as demonstrated for an fir example.