DocumentCode
3189342
Title
Stuck-open fault diagnosis with stuck-at model
Author
Fan, Xinyue ; Moore, Will ; Hora, Camelia ; Gronthoud, Guido
Author_Institution
Dept. of Eng. Sci., Oxford Univ., UK
fYear
2005
fDate
22-25 May 2005
Firstpage
182
Lastpage
187
Abstract
While most of the fault diagnosis tools are based on gate level fault models, many faults are actually at the transistor level. The stuck-open fault is one of them. In this paper we introduce a stuck-open fault diagnosis method based on the stuck-at fault model. First we investigate how stuck-open faults show in the stuck-at diagnosis. Based on the stuck-at diagnosis result, a transformation method is used to represent stuck-open faults. This method transforms the transistor level circuit description to a gate level description so that the stuck-open faults can be diagnosed directly by any of the stuck-at fault diagnosis tools. After the transformation, all the stuck-open faults are fully diagnosed by FALOC, a gate level fault diagnosis tool from Philips.
Keywords
fault simulation; integrated circuit testing; logic testing; FALOC; fault diagnosis tools; gate level description; gate level fault models; stuck-at model; stuck-open fault diagnosis; transistor level circuit description; CMOS technology; Circuit faults; Digital circuits; Fault detection; Fault diagnosis; Integrated circuit interconnections; Predictive models; Robustness; Test pattern generators; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 2005. European
Print_ISBN
0-7695-2341-2
Type
conf
DOI
10.1109/ETS.2005.35
Filename
1430028
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