DocumentCode
3189565
Title
A Self-Testing Fully Pipelined Implementation for the Advanced Encryption Standard
Author
Nazm-Bojnordi, Mahdi ; Sedaghati-Mokhtari, Naser ; Fakhraie, Seid Mehdi
Author_Institution
Silicon Intelligence and VLSI Signal Processing Laboratory ECE Department, University of Tehran, Tehran, IRAN. m.bojnordi@ece.ut.ac.ir
fYear
2005
fDate
13-15 Dec. 2005
Firstpage
260
Lastpage
263
Abstract
In contrast to software implementation, hardware implementation of encryption protocols provides a higher level of security and cryptography speed at some flexibility cost. In this paper, different existing implementations of Advanced Encryption Standard (AES) are considered and a fully pipelined implementation for the AES is presented. Implementation considers both encryption and decryption. The design is optimized for achieving higher speed and lower area cost. The Selected algorithm for our design is Rijndael. The major part of an AES design is designing substitute boxes (S-box). S-boxes in our design are implemented at a lower cost rather than the existing implementations. Throughput of up to 6 Gbps is gained by our proposed architecture. This implementation is equipped with BIST architecture for self testing.
Keywords
AES; BIST; Rijndael; fully pipeline implementation; self-testing; Algorithm design and analysis; Automatic testing; Built-in self-test; Cost function; Cryptographic protocols; Cryptography; Design optimization; Hardware; Security; Throughput; AES; BIST; Rijndael; fully pipeline implementation; self-testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics, 2005. ICM 2005. The 17th International Conference on
Print_ISBN
0-7803-9262-0
Type
conf
DOI
10.1109/ICM.2005.1590080
Filename
1590080
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