Mixed-swing methodology for domino logic circuits

Author

Rave, A. ; Carley, L.R.

Author_Institution

Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA

fYear

2001

fDate

2001

Firstpage

85

Lastpage

88

Abstract

In this paper we present a multiplier-accumulator (MAC) implemented in mixed-swing dual-rail domino logic. The performance in the presence of noise and on-chip coupling is studied. A completely on-chip voltage regulation technique which adjusts the degree of voltage regulation in the MAC in the face of process induced delay variations so as to minimize energy dissipation while always guaranteeing the target operating frequency is also described. Measurements for a commercial 0.5 μm CMOS process demonstrate that the mixed-swing methodology with series regulation is a viable low power high speed solution for multiplier circuits

Keywords

CMOS logic circuits; digital arithmetic; digital signal processing chips; high-speed integrated circuits; logic design; low-power electronics; multiplying circuits; 0.5 micron; CMOS process; DSP MAC; MAC implementation; domino logic circuits; mixed-swing dual-rail domino logic; mixed-swing methodology; multiplier circuits; multiplier-accumulator implementation; noise; onchip coupling; onchip voltage regulation technique; process induced delay variations; CMOS process; Circuit noise; Coupling circuits; Delay; Energy dissipation; Frequency; Logic circuits; Power measurement; Velocity measurement; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits, 2001, IEEE Conference on.

Conference_Location

San Diego, CA

Print_ISBN

0-7803-6591-7

Type

conf

DOI

10.1109/CICC.2001.929729

Filename

929729