Title :
A 900 MS/s 6b interleaved CMOS flash ADC
Author :
Yu, Baiying ; Black, William C., Jr.
Author_Institution :
Analog & Mixed-Signal Design Center, Iowa State Univ., Ames, IA, USA
Abstract :
A 900 MS/s, 6 bit, 4-way, time-interleaved flash ADC is demonstrated. The 4 on-chip ADCs share a common reference string and preamplifiers to minimize the mismatch between channels. The measured SNDR is over 31 dB at 900 MHz with analog input at 1.1 MHz. The chip has been fabricated in a standard 0.25 μm CMOS process and occupies an active area of 2.08 mm2
Keywords :
CMOS integrated circuits; analogue-digital conversion; error analysis; high-speed integrated circuits; 0.25 micron; 1.1 MHz; 31 dB; 4-way configuration; 6 bit; 900 MHz; common preamplifiers; common reference string; interleaved CMOS flash ADC; time-interleaved A/D convertor; CMOS process; Clocks; Degradation; Frequency estimation; Performance gain; Preamplifiers; Sampling methods; Semiconductor device measurement; Signal to noise ratio; Timing;
Conference_Titel :
Custom Integrated Circuits, 2001, IEEE Conference on.
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-6591-7
DOI :
10.1109/CICC.2001.929744
