Integrated time- and event-triggered scheduling - An overhead analysis on the ARM architecture

Slot shifting is a method to combine time-triggered and event-triggered scheduling of real-time systems. It analyzes offline constructed scheduling tables for the amount and location of unused resources, called spare capacities, which are used to accommodate event-triggered activities, such as aperiodic tasks. Spare capacities are efficiently represented to indicate available resources and the flexibility to shift offline scheduled tasks while maintaining their feasibility with respect to their original timing constraints. In this paper, we study the overhead costs involved in the practical implementation of slot shifting. We present results from measurements on the cycle accurate multi-processor systems-on-chip simulator MPARM, which indicate the execution time and memory costs of the various steps of online slot shifting for the ARM architecture. These allow a designer to select configurations and trade-offs for the implementation. We present the insights gained which lead to a redesign of the original algorithm.