FeRAM device and circuit technologies fully compatible with advanced CMOS

Author

Toyoshima, Hisashi ; Kobayashi, S. ; Yamada, J. ; Miwa, Takashi ; Koike, Hideaki ; Takeuchi, H. ; Mori, Hisamichi ; Kasai, Naoki ; Maejima, Yuto ; Tanabe, Nari ; Tatsumi, Taizo ; Hada, Hiromitsu

Author_Institution

ULSI Device Dev. Div., NEC Corp., Sagamihara

fYear

2001

fDate

2001

Firstpage

171

Lastpage

178

Abstract

Recent progress in FeRAM device and circuit technologies that are fully compatible with advanced CMOS logic is described. We have developed a ferroelectric capacitor of a CMVP (capacitor-on-Metal/Via-stacked-Plug) memory cell that is fabricated after the completion of multilevel metallization. A 0.35-μm 2T/2C FeRAM macro based on CMVP has been fabricated for smart card applications. The chip features a wide operation voltage range, high write/read endurance, low consumption current, and a flexible memory size. The CMVP technologies also enable a 0.25-μm ASIC SRAM macro to be nonvolatile (NV-SRAM: nonvolatile SRAM). The memory cell consists of a six-transistor SRAM cell and two stacked back-up ferroelectric capacitors. A Vdd/2 plate line architecture makes read/write fatigue virtually negligible

Keywords

CMOS logic circuits; application specific integrated circuits; ferroelectric capacitors; ferroelectric storage; integrated memory circuits; random-access storage; 0.25 micron; 0.35 micron; ASIC SRAM macro; CMVP memory cell; FeRAM circuit technologies; FeRAM device technologies; NV-SRAM; Vdd/2 plate line architecture; advanced CMOS logic compatibility; capacitor-on-metal/via-stacked-plug; ferroelectric capacitor; flexible memory size; high write/read endurance; low consumption current; multilevel metallization; nonvolatile SRAM; six-transistor SRAM cell; smart card applications; stacked back-up ferroelectric capacitors; wide operation voltage range; CMOS logic circuits; CMOS memory circuits; CMOS technology; Capacitors; Ferroelectric films; Ferroelectric materials; Logic devices; Metallization; Nonvolatile memory; Random access memory;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits, 2001, IEEE Conference on.

Conference_Location

San Diego, CA

Print_ISBN

0-7803-6591-7

Type

conf

DOI

10.1109/CICC.2001.929749

Filename

929749