Title :
An ASIC-embedded content addressable memory with power-saving and design for test features
Author :
Chadwick, Thomas ; Gordon, Tarl ; Nadkarni, Rahul ; Rowland, Jeremy
Author_Institution :
Microelectron. Div., IBM Corp., Essex Junction, VT, USA
Abstract :
As the available circuit counts of standard-cell ASICs continue to increase, the issues of power dissipation and testability become increasingly important. In response to this trend, the embedded content addressable memory (CAM) described herein was designed with an emphasis on reducing active power dissipation and on improving the in-system testability via built-in self-test (BIST). At the same time, the CAM macro has been designed with flexibility in mind. Application examples will highlight this aspect of the macro. This CAM has been designed and manufactured in a 0.18 μm photolithography process with copper metallization. Results of hardware observations from a test chip confirm functionality in silicon
Keywords :
application specific integrated circuits; built-in self test; content-addressable storage; design for testability; integrated circuit metallisation; low-power electronics; photolithography; 0.18 micron; ASIC-embedded content addressable memory; active power dissipation; built-in self-test; design for test features; functionality; in-system testability; metallization; photolithography process; power dissipation; power-saving; standard-cell ASICs; Associative memory; Automatic testing; Built-in self-test; CADCAM; Circuit testing; Computer aided manufacturing; Copper; Lithography; Manufacturing processes; Power dissipation;
Conference_Titel :
Custom Integrated Circuits, 2001, IEEE Conference on.
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-6591-7
DOI :
10.1109/CICC.2001.929751
