• DocumentCode
    3190804
  • Title

    Multi-Gbit I/O and interconnect co-design for power efficient links

  • Author

    Jaussi, James E. ; Leddige, Mike ; Horine, Bryce ; Mahony, Frank O. ; Casper, Bryan

  • Author_Institution
    Intel Labs., Intel Corp., Hillsboro, OR, USA
  • fYear
    2010
  • fDate
    25-27 Oct. 2010
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    The co-design of a 10Gb/s 45nm CMOS transceiver and low-loss interconnect for parallel links demonstrates 1.4-2.4pJ/bit I/O power efficiency. A C4 bump pattern with an effective 20:3 signal to ground ratio is implemented with on-die transmission line routing to escape from the I/O circuitry to the package-die interface. Top-of-the-package connector based (TPCB) interconnects, including high density interconnect (HDI), bonded polyimide (PI) flex, liquid crystal polymer (LCP) flex and micro-twinax cables, are trace length matched in bundles of 9 or 10 I/O lanes to minimize clocking power while requiring only 2-tap TX equalization and 106-373mVpp-diff TX swing. The link measured maximum lane-to-lane phase mismatch ranged from 6ps to 22ps.
  • Keywords
    CMOS integrated circuits; integrated circuit design; integrated circuit interconnections; integrated circuit packaging; network routing; transceivers; C4 bump pattern; CMOS transceiver; I/O circuitry; LCP flex; bit rate 10 Gbit/s; bonded polyimide flex; high density interconnect; interconnect codesign; liquid crystal polymer; low-loss interconnect; microtwinax cable; multiGbit I/O; on-die transmission line routing; package-die interface; parallel links; power efficient links; signal-to-ground ratio; size 45 nm; top-of-the-package connector based interconnects; Clocks; Connectors; Flexible printed circuits; Insertion loss; Integrated circuit interconnections; Routing; Semiconductor device measurement; HDI; area array connectors; flex; micro-twinax cable; power efficient I/O; top of the package interconnects;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical Performance of Electronic Packaging and Systems (EPEPS), 2010 IEEE 19th Conference on
  • Conference_Location
    Austin, TX
  • Print_ISBN
    978-1-4244-6865-2
  • Electronic_ISBN
    978-1-4244-6866-9
  • Type

    conf

  • DOI
    10.1109/EPEPS.2010.5642529
  • Filename
    5642529