Title :
An ESD protection circuit for mixed-signal ICs
Author :
Feng, Haigang ; Gong, Ke ; Wang, Albert Z.
Author_Institution :
Dept. of Electr. & Comput. Eng., Illinois Inst. of Technol., Chicago, IL, USA
Abstract :
A new ESD (electrostatic discharge) protection circuit was designed and implemented in commercial BiCMOS. One such ESD unit is adequate for each I/O pin to survive ESD stressing of all modes. This novel ESD circuit features adjustable low-trigger-voltage, symmetric active discharge channels in all directions, fast response, and high ESD performance/area ratio. It passed 14 kV HBM and 15 kV airgap IEC ESD zapping. This compact ESD structure minimizes parasitic effects, which is desired for mixed-signal and RF ICs
Keywords :
BiCMOS integrated circuits; UHF integrated circuits; electrostatic discharge; mixed analogue-digital integrated circuits; protection; 14 kV; 15 kV; ESD protection circuit; ESD stressing; I/O pin; RF ICs; adjustable low-trigger-voltage discharge channels; commercial BiCMOS process; compact ESD structure; electrostatic discharge protection; mixed-signal ICs; symmetric active discharge channels; Application specific integrated circuits; BiCMOS integrated circuits; Electrostatic discharge; Electrostatic interference; Neodymium; Protection; RF signals; Radio frequency; Radiofrequency integrated circuits; Voltage;
Conference_Titel :
Custom Integrated Circuits, 2001, IEEE Conference on.
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-6591-7
DOI :
10.1109/CICC.2001.929828
