Title :
I/O power estimation and analysis of high-speed channels in through-silicon via (TSV)-based 3D IC
Author :
Kim, Joohee ; Cho, Jonghyun ; Pak, Jun So ; Song, Taigon ; Kim, Joungho ; Lee, Hyungdong ; Lee, Junho ; Park, Kunwoo
Author_Institution :
Dept. of Electr. Eng., KAIST, Daejeon, South Korea
Abstract :
In today´s integrated circuits, power consumption has become the most important factor, and must be seriously investigated among the various performance metrics. In this study, power estimations for various through-silicon via (TSV)-based three-dimensional integrated circuit (3D IC) designs were conducted in efforts to realize low-power-consumption 3D IC. In addition, the dominant power-consuming factor was found among the TSV-based interconnect components by a power comparison analysis based on the proposed model.
Keywords :
integrated circuit design; three-dimensional integrated circuits; I/O power estimation; TSV-based 3D IC design; TSV-based interconnect component; high-speed channel; power comparison analysis; power consumption; three-dimensional integrated circuit; through-silicon via; Capacitance; Metals; Power demand; Silicon; Three dimensional displays; Through-silicon vias; dynamic power consumption; interposer; re-distribution layer (RDL); three-dimensional integrated circuit (3D IC); through-silicon via (TSV);
Conference_Titel :
Electrical Performance of Electronic Packaging and Systems (EPEPS), 2010 IEEE 19th Conference on
Conference_Location :
Austin, TX
Print_ISBN :
978-1-4244-6865-2
Electronic_ISBN :
978-1-4244-6866-9
DOI :
10.1109/EPEPS.2010.5642539
