Title :
Efficient multilevel interconnect topology for cluster-based mesh FPGA architecture
Author :
Amouri, Emna ; Blanchardon, Adrien ; Chotin-Avot, Roselyne ; Mehrez, H. ; Marrakchi, Z.
Author_Institution :
LIP6 Lab., Univ. Pierre et Marie Curie, Paris, France
Abstract :
This paper presents an improved cluster-based Mesh architecture. This architecture has a depopulated intra-cluster interconnect, and presents a new hierarchical topology for the switch box which unifies a downward and an upward unidirectional networks. Experimental results of 20 MCNC benchmarks show that density is improved and interconnect area requirement is reduced by 42 % compared to the cluster-based VPR architecture.
Keywords :
field programmable gate arrays; integrated circuit interconnections; pattern clustering; MCNC unidirectional; VPR architecture; cluster-based mesh FPGA architecture; depopulated intracluster interconnect; downward unidirectional networks; field programmable gate arrays; hierarchical topology; multilevel interconnect topology; switch box; upward unidirectional networks; Computer architecture; Field programmable gate arrays; Integrated circuit interconnections; Niobium; Routing; Switches; Topology;
Conference_Titel :
Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on
Conference_Location :
Cancun
Print_ISBN :
978-1-4799-2078-5
DOI :
10.1109/ReConFig.2013.6732282
