DocumentCode :
3191139
Title :
Why linear arrays are better image processors
Author :
Jonker, Pieter P.
Author_Institution :
Fac. of Appl. Phys., Delft Univ. of Technol., Netherlands
fYear :
1994
fDate :
9-13 Oct 1994
Firstpage :
334
Abstract :
The four main characteristic architectures for low-level image processing are the square processor array (SPA) or mesh, the linear processor array (LPA) or scanning array, the pipeline (PL) and the pyramid (PYR). In this paper a theoretical study is presented which leads from a taxonomy of low-level image processing operations and a theoretical model of a nearest neighbour connected processor to the combinations of 7 possibilities to exchange parallel for sequential solutions when designing an architecture. The implementation of two “standard” image processing routines on the theoretical processor, skeletonization of a binary image and shading correction in a greyvalue image, while making the design decisions in line with the solutions commonly found in the four characteristic architectures, showed that linear processor arrays when properly designed, seem to offer the best speed/efficiency combination even for processing images at video speed
Keywords :
image processing; binary image; greyvalue image; image processors; linear processor array; low-level image processing; mesh; nearest neighbour connected processor; pipeline; pyramid; scanning array; shading; skeletonization; square processor array; Availability; Clocks; Image processing; Kernel; Logic; Pattern recognition; Physics; Pipelines; Pixel; Taxonomy;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Pattern Recognition, 1994. Vol. 3 - Conference C: Signal Processing, Proceedings of the 12th IAPR International Conference on
Conference_Location :
Jerusalem
Print_ISBN :
0-8186-6275-1
Type :
conf
DOI :
10.1109/ICPR.1994.577193
Filename :
577193
Link To Document :
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