A New Pipelined Architecture for the DLMS Algorithm

This paper presents a design of a systolic array architecture for the 1-dimensional Finite Impulse Response adaptive filter. The design is based on the Delayed Least Mean Squares algorithm (DLMS). The performance of the proposed design is analyzed in terms of speed up, adaptation delay and throughput. This realization results in a lowest critical period equal to one multiply operation time and a higher throughput. Unlike the existing architectures the adaptation delay of this design is independent of the filter length and has a higher speedup. It is shown that the convergence performance of this design is in par with the conventional LMS algorithm.