A Novel VLSI Archiecture for an Integrated Crypto Processor

Applications such as electronic banking, electronic commerce, and Virtual Private Networks (VPNs) require an efficient and cost-effective way to address the security threats over public networks. Cryptography is the fundamental component for securing the Internet traffic. However, Cryptographic algorithms impose tremendous processing power demands that can be a bottleneck in high-speed networks. The ultimate solution for the problem would be an adaptive processor that can provide software-like flexibility with hardware-like performance In this paper we propose a technique that is based on the integration of popular crypto techniques by taking Triple DES, IDEA and AES algorithms with suitable modifications. The encryption is done through block cipher method. Each crypto algorithm is randomly chosen for each clock pulse in order to perform the encryption. Both the randomized order and the key will be sent through Diffie-Hellman key exchange. The decryption will be performed in the same order in which the encryption is processed. The proposed technique has been designed to be suitable for the high-speed intranet LAN that uses Cisco switches and RISC based server.