System-level modeling and simulation of periodic jitter in high-speed links

Author

Chang, Yu Sam ; Oh, Dan

Author_Institution

Rambus Inc., Los Altos, CA, USA

fYear

2010

fDate

25-27 Oct. 2010

Firstpage

117

Lastpage

120

Abstract

Power supply induced jitter (PSIJ) is one of the major bottlenecks in high-speed I/O designs. Modeling the impact of PSIJ in overall link performance is a quite challenging task. So far, only simple transmitter sinusoidal jitter (SJ) has been analyzed in the current state-of-the-art statistical link analysis tools. In this paper, we present a statistical formulation for general PSIJ for both transmitters and receivers. The presented method also accounts for any potential jitter tracking effects between transmitters and receivers. The results are verified using both transient simulation and lab measurements.

Keywords

interference (signal); jitter; receivers; statistical analysis; transmitters; high-speed I/O designs; high-speed links; jitter tracking effects; periodic jitter; power supply induced jitter; receivers; sinusoidal jitter; statistical link analysis tools; system-level modeling; transmitters; Clocks; Correlation; Integrated circuit modeling; Jitter; Noise; Receivers; Transmitters; BER; effective voltage noise; link performance; peroidic jitter; statistical link analysis; suply noise;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical Performance of Electronic Packaging and Systems (EPEPS), 2010 IEEE 19th Conference on

Conference_Location

Austin, TX

Print_ISBN

978-1-4244-6865-2

Electronic_ISBN

978-1-4244-6866-9

Type

conf

DOI

10.1109/EPEPS.2010.5642560

Filename

5642560