• DocumentCode
    3191390
  • Title

    Fast and Accurate Waveform Analysis with Current Source Models

  • Author

    Veetil, Vineeth ; Sylvester, Dennis ; Blaauw, David

  • Author_Institution
    Univ. of Michigan, Ann Arbor
  • fYear
    2008
  • fDate
    17-19 March 2008
  • Firstpage
    53
  • Lastpage
    56
  • Abstract
    Recently current source models (CSMs) have become popular for use in standard cell characterization and static timing analysis. However, there has not been any detailed study of what aspects of the gate behavior should be modeled for sufficient accuracy, and there have been no results reported incorporating a CSM into a timing analysis flow with reasonable runtime. This paper addresses these limitations by investigating complexity/accuracy tradeoffs in CSMs. We then present a novel technique to perform fast, accurate waveform analysis using CSMs. STA results on benchmark circuits show significantly reduced errors compared to a traditional Thevenin-based flow. In terms of mu+sigma percentile, we gain by 20-150 % in slew through this approach.
  • Keywords
    CMOS logic circuits; electric current; integrated circuit modelling; logic gates; timing; waveform analysis; CMOS process; benchmark circuits; current source models; errors reduction; logic gate behavior; standard cell characterization; static timing analysis; timing analysis flow; waveform analysis; Circuits; Delay; Engines; Parasitic capacitance; Runtime; SPICE; Semiconductor device modeling; Spline; Timing; Voltage; bicubic spline; current source model; weibull;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Quality Electronic Design, 2008. ISQED 2008. 9th International Symposium on
  • Conference_Location
    San Jose, CA
  • Print_ISBN
    978-0-7695-3117-5
  • Type

    conf

  • DOI
    10.1109/ISQED.2008.4479697
  • Filename
    4479697