A hierarchical compression engine

Author

Albanesi, M.G. ; Ferretti, M. ; Leoni, S.

Author_Institution

Dipartimento di Inf. e Sistemistica, Pavia Univ., Italy

fYear

1994

fDate

9-13 Oct 1994

Firstpage

391

Abstract

The main goal of the research activity here presented is to realise a dedicated real-time architecture for still-images compression based on a multiresolution approach for the three phases of image transformation, compression and coding. The algorithm embedded into the architecture is adaptive on the input image characteristics, and it is based on a well-known instance of wavelet transform: the Haar transform. The algorithm has been tested in a rather exhaustive set of benchmarks and has been cast into a single-chip design. The paper introduces the main features of the algorithm and describes the problem of mapping the algorithm into a dedicated architecture. The result of this mapping is the chip described

Keywords

data compression; Haar transform; dedicated real-time architecture; hierarchical compression engine; image coding; image transformation; multiresolution approach; single-chip design; still-images compression; wavelet transform; Algorithm design and analysis; Benchmark testing; Compression algorithms; Computer architecture; Electronic mail; Engines; Image coding; Pipelines; Silicon; Wavelet transforms;

fLanguage

English

Publisher

ieee

Conference_Titel

Pattern Recognition, 1994. Vol. 3 - Conference C: Signal Processing, Proceedings of the 12th IAPR International Conference on

Conference_Location

Jerusalem

Print_ISBN

0-8186-6275-1

Type

conf

DOI

10.1109/ICPR.1994.577213

Filename

577213