DocumentCode :
3191608
Title :
Composable thermal modeling and characterization for fast temperature estimation
Author :
Wang, Hai ; Li, Duo ; Tan, Sheldon X D ; Tirumala, Murli ; Gupta, Ashish X.
Author_Institution :
Dept. of Electr. Eng., Univ. of California, Riverside, CA, USA
fYear :
2010
fDate :
25-27 Oct. 2010
Firstpage :
185
Lastpage :
188
Abstract :
Efficient temperature estimation is critical for designing thermal efficient, low power and robust integrated circuits in nanometer regime. Thermal simulation starts from the detailed thermal structures by solving thermal diffusion equations no longer meets demanding tasks for efficient design space exploration. Compact and composable model-based simulation provides a viable solution to this difficult problem. However, building such thermal models from detailed thermal structures was not well addressed in the past. In this paper, we propose a new thermal compact modeling techniques for fast thermal analysis in the context of multi-core microprocessors design. The new approach builds the models from detailed structures for each core using finite difference method and reduces the model complexity by sampling-based model order reduction and circuit realization techniques. To improve the reduction efficiency, number of ports of thermal models are first reduced by port merging, which actually leads to coarse grids at the boundaries. The resulting thermal circuits can be simulated by general circuit simulator SPICE. Experimental results on a quad-core microprocessor architecture show that the new approach can easily build accurate thermal systems from the composite compact models. The new thermal systems lead to order of magnitude speedup over standard finite difference models in transient thermal simulation.
Keywords :
SPICE; integrated circuit modelling; integrated circuit packaging; microprocessor chips; thermal management (packaging); SPICE; fast temperature estimation; fast thermal analysis; general circuit simulator; multi core microprocessor design; thermal circuits; thermal compact modeling technique; thermal efficient low power robust integrated circuit; Boundary conditions; Central Processing Unit; Electronic packaging thermal management; Integrated circuit modeling; Mathematical model; Multicore processing; Thermal analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Performance of Electronic Packaging and Systems (EPEPS), 2010 IEEE 19th Conference on
Conference_Location :
Austin, TX
Print_ISBN :
978-1-4244-6865-2
Electronic_ISBN :
978-1-4244-6866-9
Type :
conf
DOI :
10.1109/EPEPS.2010.5642577
Filename :
5642577
Link To Document :
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