A flexible and efficient hardware architecture for real-time face recognition based on eigenface

We describe a flexible and efficient multilane architecture for real-time face recognition system based on modular principal component analysis (PCA) method in a field programmable gate array (FPGA) environment. We have shown in Gottumukkal R., and Asan K.V., (2004) that modular PCA improves the accuracy of face recognition when the face images have varying expression and illumination. The flexible and parallel architecture design consists of multiple processing elements to operate on predefined regions of a face image. Each processing element is also parallelized with multiple pipelined paths/lanes to simultaneously compute weight vectors of the non-overlapping region, hence called multilane architecture. The architecture is able to recognize a face image from a database of 1000 face images in 11ms.