Title :
Program analysis for cache coherence: beyond procedural boundaries
Author :
Choi, Lynn ; Yew, Pen-Chung
Author_Institution :
Microprocessor Group, Intel Corp., Santa Clara, CA, USA
Abstract :
The presence of procedures and procedure calls introduces side effects, which complicates the analysis of stale reference detection in compiler-directed cache coherence schemes. Previous compiler algorithms use cache invalidation at procedure boundary or inlining to avoid reference marking interprocedurally. We introduce a full interprocedural algorithm, which performs bottom-up and top-down analysis on the procedure call graph. This avoids unnecessary cache misses for subroutine local data and exploits locality across procedure boundaries. The result of execution-driven simulations on Perfect benchmarks demonstrates that, the interprocedural algorithm eliminates up to 36.8% of the cache misses for a compiler-directed scheme compared to an existing invalidation-based algorithm
Keywords :
cache storage; coherence; data flow analysis; parallel programming; program compilers; subroutines; Perfect benchmarks; bottom-up analysis; cache coherence; cache invalidation; cache misses; compiler algorithms; compiler-directed cache coherence schemes; execution-driven simulations; full interprocedural algorithm; procedure call graph; procedure calls; procedures; program analysis; reference marking; stale reference detection; subroutine local data; top-down analysis; Algorithm design and analysis; Cause effect analysis; Computer science; Data analysis; Flow graphs; Information analysis; Microprocessors; Optimizing compilers; Performance analysis; Program processors;
Conference_Titel :
Parallel Processing, 1996. Vol.3. Software., Proceedings of the 1996 International Conference on
Conference_Location :
Ithaca, NY
Print_ISBN :
0-8186-7623-X
DOI :
10.1109/ICPP.1996.538565