DocumentCode
3192472
Title
An optimized lookup-table for the evaluation of sigmoid function for artificial neural networks
Author
Meher, Pramod Kumar
Author_Institution
Dept. of Embedded Syst., Inst. for Infocomm Res., Singapore, Singapore
fYear
2010
fDate
27-29 Sept. 2010
Firstpage
91
Lastpage
95
Abstract
In this paper, we present an efficient design of lookup-table (LUT) for the evaluation of hyperbolic tangent sigmoid to be used for the hardware implementation of artificial neural networks. Besides, we have suggested an LUT optimization scheme which maximizes the number of argument values in a sub-domain corresponding to each LUT word for a specified limit of accuracy. We have shown that the hardware-complexity of the proposed LUT implementation could be significantly reduced by using simplified combinational circuits for selective sign-conversion and efficient design of range decoder by logic subexpression sharing. From the synthesis results, we find that the proposed design involves comparable delay, but requires less than one-fourth of the area and area-delay complexity compared with the existing LUT-based implementations.
Keywords
artificial intelligence; combinational circuits; neural nets; table lookup; LUT optimization scheme; area-delay complexity; artificial neural networks; combinational circuits; hardware-complexity; hyperbolic tangent sigmoid evaluation; logic subexpression sharing; optimized lookup-table; range decoder; selective sign-conversion design; sigmoid function evaluation; Conferences; System-on-a-chip; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI System on Chip Conference (VLSI-SoC), 2010 18th IEEE/IFIP
Conference_Location
Madrid
Print_ISBN
978-1-4244-6469-2
Type
conf
DOI
10.1109/VLSISOC.2010.5642617
Filename
5642617
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