Title :
A High-Performance Bus Architecture for Strongly Coupled Interconnects
Author :
Skoufis, Michael N. ; Karmarkar, Kedar ; Haniotakis, Themistoklis ; Tragoudas, Spyros
Author_Institution :
Southern Illinois Univ., Carbondale
Abstract :
Coupling and increasing wire resistance on interconnect fabrics undermine the speed of the transient electrical signals. A brute-force approach for a crosstalk-reduced design relies on increasing the distance of interconnects from each other and using additional repeated logic. A pipelined bus-architecture exploiting the existing electrical noise is proposed. Process variations are taken into consideration in the analysis. The proposed technique is validated for the 65 nm and 90 nm CMOS processes for interconnects of various lengths.
Keywords :
CMOS integrated circuits; coupled circuits; logic design; system buses; CMOS processes; additional repeated logic; brute force approach; coupled interconnects; crosstalk reduced design; high performance bus architecture; interconnect fabrics; pipelined bus architecture; process variations; size 65 nm; size 90 nm; wire resistance; CMOS process; CMOS technology; Crosstalk; Fabrics; Integrated circuit interconnections; Logic design; Network-on-a-chip; Repeaters; Voltage; Wire; crosstalk; high-speed bus;
Conference_Titel :
Quality Electronic Design, 2008. ISQED 2008. 9th International Symposium on
Conference_Location :
San Jose, CA
Print_ISBN :
978-0-7695-3117-5
DOI :
10.1109/ISQED.2008.4479766
