• DocumentCode
    3192849
  • Title

    Yield and reliability effects of interlevel dielectric plasma enhanced deposition induced charging damage

  • Author

    Scarpa, Andrea ; Van Marwijk, Leo ; Peters, Walter ; Boter, Dick ; Kuper, Fred G.

  • Author_Institution
    Philips Semicond., Nijmegen, Netherlands
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    44
  • Lastpage
    47
  • Abstract
    The gate oxide damage induced by plasma enhanced CVD of ILD has been investigated. It was observed that this kind of plasma damage induces oxide soft breakdown, rather than hard breakdown, due to the high resistance of the deposited film. This fact has important implications for IC yield and reliability. In fact, soft breakdowns hardly cause IC yield loss during the e-sort. Nevertheless, the gate oxide reliability can be seriously affected by the plasma induced damage and the IC intrinsic lifetime severely reduced
  • Keywords
    CMOS integrated circuits; dielectric thin films; integrated circuit interconnections; integrated circuit metallisation; integrated circuit reliability; integrated circuit testing; integrated circuit yield; oxidation; plasma CVD; surface charging; IC intrinsic lifetime; IC yield; IC yield loss; ILD; SiO2-Si; e-sort; film resistance; gate oxide damage; gate oxide reliability; hard breakdown; interlevel dielectric plasma enhanced deposition induced charging damage; oxide soft breakdown; plasma damage; plasma enhanced CVD; plasma induced damage; reliability; CMOS technology; Dielectrics; Electric breakdown; Plasma density; Plasma devices; Plasma measurements; Plasma sources; Plasma temperature; Semiconductor device reliability; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Plasma- and Process-Induced Damage, 2001 6th International Symposium on
  • Conference_Location
    Monterey, CA
  • Print_ISBN
    0-9651577-5-X
  • Type

    conf

  • DOI
    10.1109/PPID.2001.929975
  • Filename
    929975