• DocumentCode
    3193044
  • Title

    Plasma charging damage in SOI technology

  • Author

    Mocuta, Anda C. ; Hook, Terence B. ; Chou, Anthony I. ; Wagner, Tina ; Stamper, Anthony K. ; Khare, Mukesh ; Gambino, Jeffrey P.

  • Author_Institution
    IBM Microelectron., Hopewell Junction, NY, USA
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    104
  • Lastpage
    107
  • Abstract
    SOI MOSFET devices have proven very robust to plasma process induced gate oxide damage. In this work, we demonstrate that SOI devices with very large antenna ratios may be successfully fabricated without damage, provided that asymmetry of charging is not intentionally introduced, no connection is made to the wafer bulk, and that the integrity of the buried oxide is maintained
  • Keywords
    CMOS integrated circuits; MOSFET; buried layers; plasma materials processing; semiconductor device reliability; semiconductor device testing; silicon-on-insulator; sputter etching; surface charging; SOI MOSFET; SOI devices; SOI technology; Si-SiO2; antenna ratios; buried oxide integrity; charging asymmetry; damage-free fabrication; plasma charging damage; plasma process induced gate oxide damage; wafer bulk connection; Crystallization; Dielectric devices; Implants; MOSFET circuits; Microelectronics; Plasma devices; Plasma sources; Robustness; Silicon on insulator technology; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Plasma- and Process-Induced Damage, 2001 6th International Symposium on
  • Conference_Location
    Monterey, CA
  • Print_ISBN
    0-9651577-5-X
  • Type

    conf

  • DOI
    10.1109/PPID.2001.929989
  • Filename
    929989
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3193044