A Simplified Model of Carbon Nanotube Transistor with Applications to Analog and Digital Design

A compact model for the Carbon nanotube transistor (CNFET) is presented in this work. This simple model aids the first-order analysis for digital and analog design with CNFET. Based on the physical understanding of ballistic transport in the CNFET channel and tunneling at the Schottky barrier contacts, we develop a set of closed- form expressions that predict the device behavior with varying process and bias conditions. Using this model, we compare a CNFET with 22 nm MOSFET in both digital and analog domains. We conclude that (1) a CNFET digital circuit can be more than 1 OX faster than 22 nm CMOS; (2) there is 1 OX improvement in gmfor comparable device dimensions, and (3) >25X improvement in gosfor comparable saturation current. This simple, scalable model is an efficient tool for analytical treatment of CNFET based circuits, revealing potential design opportunities, especially in the analog domain.