DocumentCode :
3193319
Title :
FPGA architecture for real-time barrel distortion correction of colour images
Author :
Blasinski, Henryk ; Hai, Wei ; Lohier, Frantz
Author_Institution :
ECE Deptartment, University of Rochester, NY, USA
fYear :
2011
fDate :
11-15 July 2011
Firstpage :
1
Lastpage :
6
Abstract :
This paper presents a hardware architecture for real time barrel distortion correction of YUV 4∶2∶2 encoded color images. In our solution we are presenting an alternative implementation of the correction engine which is based on multiplications rather than trigonometric transforms. The system makes minimal use of resources thus being a good candidate for embedding into a single chip. Proposed solution is implemented in a cost-effective Spartan 3 Field Programmable Gate Array (FPGA). Our architecture is capable of processing QQVGA images at the rate of 30 frames per second (fps). Qualitative and quantitative examination confirm correct preservation of color information in processed images.
Keywords :
Field Programmable Gate Array (FPGA); YUV 4∶2∶2; frame buffer; real-time barrel distortion correction;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Multimedia and Expo (ICME), 2011 IEEE International Conference on
Conference_Location :
Barcelona, Spain
ISSN :
1945-7871
Print_ISBN :
978-1-61284-348-3
Electronic_ISBN :
1945-7871
Type :
conf
DOI :
10.1109/ICME.2011.6011854
Filename :
6011854
Link To Document :
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