DocumentCode :
3193366
Title :
System-in-Package Technology: Opportunities and Challenges
Author :
Fontanelli, Anna
Author_Institution :
Mentor Graphics Corp., Wilsonville
fYear :
2008
fDate :
17-19 March 2008
Firstpage :
589
Lastpage :
593
Abstract :
In 2006, the leading wireless phone industry has introduced literally hundreds of new, different wireless phones, which have been manufactured in approximately 1 billion units, generating revenue of about $128B. The semiconductor revenue has been about $33B. The ASP is declining, both in the wireless phone and semiconductor industry. In order to fix that, Moore´s Law is being inverted: instead of getting twice the transistors for the same cost, the wireless phones industry seeks to obtain the same number of transistors for half the cost. This is making system-on-chip (SoC) no longer a viable solution. System-in-package (SiP) looks much more promising. Lack of EDA solutions - especially the A of automation - has so far slowed down the ramp-up of SiP. In this paper we describe the landscape and present a SiP platform solution which addresses the challenges of simplification, cost reduction, quality and reliability improvement, yet allowing exploiting the most recent advances in IC packaging.
Keywords :
integrated circuit manufacture; mobile handsets; system-in-package; Moore´s Law; SoC; semiconductor industry; system-in-package technology; system-on-chip; wireless phones; Cellular phones; Costs; Electronics industry; Fabrication; Graphics; Industrial electronics; Integrated circuit packaging; Logic circuits; Radio frequency; Random access memory; Co-design; IO Planning; Stack; System in Package;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Quality Electronic Design, 2008. ISQED 2008. 9th International Symposium on
Conference_Location :
San Jose, CA
Print_ISBN :
978-0-7695-3117-5
Type :
conf
DOI :
10.1109/ISQED.2008.4479803
Filename :
4479803
Link To Document :
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