DocumentCode :
3193636
Title :
Design Margin Exploration of Spin-Torque Transfer RAM (SPRAM)
Author :
Chen, Yiran ; Wang, Xiaobin ; Li, Hai ; Liu, Harry ; Dimitrov, Dimitar V.
Author_Institution :
Seagate Technol. LLC, Fremont
fYear :
2008
fDate :
17-19 March 2008
Firstpage :
684
Lastpage :
690
Abstract :
We proposed a combined magnetic and circuit level technique to explore the design methodology of Spin-Torque Transfer RAM (SPRAM). A dynamic magnetic model of magnetic tunneling junction (MTJ), which is based upon measured spin torque induced magnetization switching behavior, is also proposed. The response of CMOS circuitry is characterized by SPICE and used as the input of our MTJ model to simulate the dynamic behavior of SPRAM cell. By using this technique, we explored the design margin of SPRAM cell with one-transistor-one-MTJ (ITU) structure. Simulation results show that our technique can significantly reduce the design pessimism, compared to conventional SRPAM cell model.
Keywords :
SRAM chips; integrated circuit design; magnetic storage; magnetic tunnelling; magnetisation; CMOS circuitry; MTJ model; SPICE; SPRAM cell; circuit level technique; combined magnetic level technique; design margin exploration; dynamic behavior; dynamic magnetic model; magnetic tunneling junction; one-transistor-one-MTJ structure; spin torque induced magnetization switching behavior; spin-torque transfer RAM; Circuit simulation; MOSFETs; Magnetic circuits; Magnetic switching; Magnetic tunneling; Magnetization; SPICE; Semiconductor device modeling; Switches; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Quality Electronic Design, 2008. ISQED 2008. 9th International Symposium on
Conference_Location :
San Jose, CA
Print_ISBN :
978-0-7695-3117-5
Type :
conf
DOI :
10.1109/ISQED.2008.4479820
Filename :
4479820
Link To Document :
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