SSD-based testing scheme for error tolerance analysis in H.264/AVC encoder

A sum of square difference (SSD) based testing approach is presented to evaluate the error tolerance (ET) for H.264/AVC encoder. The main objective in this paper of ET evaluation is to increase the effective yield of identifying faults that can be acceptable in integer discrete cosine transform (DCT) for H.264/AVC encoder. The proposed SSD-based ET scheme is designed by using the concept of the difference between residual and reconstructed residual blocks in a frame. The peak signal-to-noise ratio (PSNR) degradation is calculated to compare with the application-specific acceptable values for evaluating the video quality and determine the effective yield in H.264/AVC encoder. Additionally, the bit rate increase is analyzed to demonstrate the proposed SSD-based ET approach can provide good performance in compression for H.264/AVC encoder.