Title :
A comprehensive metric for evaluating interconnect performance
Author :
Young, Ian ; Raol, Kartik
Author_Institution :
Logic Technol. Dept., Intel Corp., Hillsboro, OR, USA
Abstract :
A methodology to benchmark and develop interconnect performance is presented. The methodology uses stochastic wiring distribution model in conjunction with a performance metric to help develop and benchmark an interconnect system for a VLSI processor using CMOS technology. The importance of repeaters is clearly demonstrated as a driver to meet performance constraints.
Keywords :
CMOS digital integrated circuits; VLSI; integrated circuit interconnections; integrated circuit modelling; stochastic processes; wiring; CMOS technology; VLSI processor; benchmark; interconnect performance; performance metric; repeaters; stochastic wiring distribution model; CMOS technology; Equations; Integrated circuit interconnections; Iterative algorithms; Logic; Measurement; Semiconductor device modeling; Stochastic processes; Stochastic systems; Wiring;
Conference_Titel :
Interconnect Technology Conference, 2001. Proceedings of the IEEE 2001 International
Conference_Location :
Burlingame, CA, USA
Print_ISBN :
0-7803-6678-6
DOI :
10.1109/IITC.2001.930034
