Title :
Optimum on-chip power distribution networks for gigascale integration (GSI)
Author :
Zarkesh-Ha, Payman ; Meindl, James D.
Author_Institution :
Microelectron. Res. Center, Georgia Inst. of Technol., Atlanta, GA, USA
Abstract :
IR-drop and simultaneous switching noise (SSN) are the main concerns for the design of an on-chip power distribution network. Analytical models for IR-drop and SSN in an on-chip power distribution network are presented. These models are used to design an optimum power distribution network to meet the requirements for the system. Utilizing the methodology presented, the requirements for power distribution of future technology generations are demonstrated.
Keywords :
chip scale packaging; equivalent circuits; flip-chip devices; integrated circuit design; integrated circuit interconnections; integrated circuit modelling; power supply circuits; IR-drop; analytical models; area-array bonding pad; equivalent circuit; gigascale integration; interconnect architecture; mesh network; optimum on-chip power distribution networks; power distribution network design; simultaneous switching noise; Bonding; Chip scale packaging; Finite element methods; Lead; Network-on-a-chip; Power distribution; Power generation; Power system modeling; Power systems; Voltage;
Conference_Titel :
Interconnect Technology Conference, 2001. Proceedings of the IEEE 2001 International
Conference_Location :
Burlingame, CA, USA
Print_ISBN :
0-7803-6678-6
DOI :
10.1109/IITC.2001.930036
