Title :
Improved Cu CMP process for 0.13 /spl mu/m node multilevel metallization
Author :
Ohashi, N. ; Yamada, Y. ; Konishi, N. ; Maruyama, H. ; Oshima, T. ; Yamaguchi, H. ; Satoh, A.
Author_Institution :
Device Dev. Center, Hitachi Ltd., Tokyo, Japan
Abstract :
A novel two-step CMP process combining improved Cu abrasive free polishing (AFP) solution with newly developed barrier metal CMP slurry for 0.13 μm node Cu damascene process is demonstrated. This CMP process can minimize the erosion and the dishing of Cu wiring. Further, two types of Cu residues, random Cu residue, and systematic Cu residue on patterned wafer are eliminated with optimizing the total process design. Using these technologies, it is shown that 0.18 μm node 7 level multilevel metallization structure is successfully formed.
Keywords :
chemical mechanical polishing; copper; integrated circuit interconnections; integrated circuit metallisation; 0.13 micron; Cu; abrasive-free polishing solution; barrier metal CMP slurry; damascene process; dishing elimination; erosion elimination; high-speed logic LSI; multilevel metallization; patterned wafer; planarity; residues elimination; two-step CMP process; Abrasives; Chemicals; Corrosion inhibitors; Design optimization; Metallization; Page description languages; Process design; Slurries; Ultra large scale integration; Wiring;
Conference_Titel :
Interconnect Technology Conference, 2001. Proceedings of the IEEE 2001 International
Conference_Location :
Burlingame, CA, USA
Print_ISBN :
0-7803-6678-6
DOI :
10.1109/IITC.2001.930040
