Title :
On Chip Jitter Measurement through a High Accuracy TDC
Author :
Garg, Akhil ; Dubey, Prashant
Author_Institution :
STMicroelectronics India Pvt Ltd., Noida
Abstract :
In high speed applications, ratio of total jitter to clock period is critical. It necessitates accurate measurement of Jitter. In this paper we describe an on- chip methodology to measure jitter in time domain, with resolutions up to 0.1 ps.
Keywords :
clocks; integrated circuit measurement; system-on-chip; time-domain analysis; timing jitter; high accuracy TDC; high speed applications; on chip jitter measurement; time domain; Circuit noise; Clocks; Frequency measurement; Jitter; Low-frequency noise; Noise measurement; Oscillators; Phase locked loops; Semiconductor device measurement; Time measurement; Jitter Measurement; PLL Test;
Conference_Titel :
Quality Electronic Design, 2008. ISQED 2008. 9th International Symposium on
Conference_Location :
San Jose, CA
Print_ISBN :
978-0-7695-3117-5
DOI :
10.1109/ISQED.2008.4479848
