DocumentCode
3195028
Title
Generation and analysis of hard to round cases for binary floating point division
Author
McFearin, Lee D. ; Matula, David W.
Author_Institution
Dept. of Comput. Sci. & Eng., Southern Methodist Univ., Dallas, TX, USA
fYear
2001
fDate
2001
Firstpage
119
Lastpage
127
Abstract
We investigate two sets of hard to round p×p bit fractions arising from division of a normalized p bit floating point dividend by a normalized p bit floating point divisor. These sets are characterized by the p×p bit fraction´s quotient bit string, beginning with or just after the round bit, having the maximum number (p-1) of repeating like bits, specifically 00…01 or 11…10 for the directed rounding “RD-hard” set and 100…01 or 11…10 for the round-to-nearest “RN-hard” set. We show both the p×p bit RD-hard and RN-hard sets to be of size at least 2p-2 and at most 2p-1. Two dimensional quotient vs. divisor plots empirically reveal both the RD-hard and RN-hard sets of p×p bit fractions to be jointly widely distributed. Analysis of patterns and linear sequences of fractions visible in the quotient vs. divisor plots leads to simplified procedures for generating test suites of hard to round fractions. Our strongest computational result is the derivation of formulas that allow 2(p/2)+O(1) RD-hard and RN-hard p×p bit fractions to be enumerated based on sequential incrementation of respective numerators and denominators
Keywords
floating point arithmetic; roundoff errors; binary floating point division; computational result; floating point divisor; fractions; hard to round cases; Algorithm design and analysis; Arithmetic; Computer aided software engineering; Computer science; Hardware; Iterative algorithms; Pattern analysis; Sequential analysis; Table lookup; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Arithmetic, 2001. Proceedings. 15th IEEE Symposium on
Conference_Location
Vail, CO
ISSN
1063-6889
Print_ISBN
0-7695-1150-3
Type
conf
DOI
10.1109/ARITH.2001.930111
Filename
930111
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