Ternary and quaternary lattice diagrams for linearly-independent logic, multiple-valued logic, and analog synthesis

Author

Perkowski, Marek A. ; Pierzchala, Edmund ; Drechsler, Rolf

Author_Institution

Dept. of Electr. Eng., Portland State Univ., OR, USA

Volume

1

fYear

1997

fDate

9-12 Sep 1997

Firstpage

269

Abstract

Ternary and quaternary lattice diagrams are introduced that can find applications to submicron design, and designing new fine-grain digital, analog and mixed FPGAs. They expand the ideas of lattice diagrams and linearly-independent (LI) logic. In a regular layout, every cell is connected to 4, 6 or 8 neighbors and to a number of vertical, horizontal and diagonal buses. Various lattices and algorithms for their creation are presented

Keywords

cellular arrays; circuit diagrams; circuit layout; field programmable gate arrays; integrated logic circuits; logic design; mixed analogue-digital integrated circuits; multivalued logic circuits; algorithms; analog FPGA; analog synthesis; cellular structures; diagonal buses; fine-grain digital FPGA; horizontal buses; layout driven logic synthesis; linearly-independent logic; mixed FPGA; multiple-valued logic synthesis; quaternary lattice diagrams; regular layout; submicron design; ternary lattice diagrams; vertical buses; Field programmable gate arrays; Geometry; Lattices; Multiplexing; Multivalued logic;

fLanguage

English

Publisher

ieee

Conference_Titel

Information, Communications and Signal Processing, 1997. ICICS., Proceedings of 1997 International Conference on

Print_ISBN

0-7803-3676-3

Type

conf

DOI

10.1109/ICICS.1997.647101

Filename

647101