DocumentCode :
3195299
Title :
A design of radix-2 on-line division using LSA organization
Author :
Tenca, Alexandre F. ; Hussaini, Syed Ubaid
Author_Institution :
Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA
fYear :
2001
fDate :
2001
Firstpage :
266
Lastpage :
273
Abstract :
This paper presents the application of the Linear Sequential Array (LSA) organization to on-line division. The LSA method was originally developed for conventional digit-recurrence algorithms, but we apply it to the on-line division algorithm. The resulting architecture is a modular and fast pipelined structure which, due to a constant fan-out, makes the critical path delay, and consequently the clock cycle time, less sensitive to operand´s precision. Such approach is particularly suitable for FPGA implementation for its modularity and reduced fanout. The basics of on-line division is presented, followed by the derivation of data dependencies and architecture according to the LSA design methodology. Experimental data is provided for both the LSA on-line divider design and standard online design, using 0.5 μm CMOS ASIC and FPGA technologies
Keywords :
CMOS logic circuits; application specific integrated circuits; digital arithmetic; field programmable gate arrays; pipeline processing; CMOS ASIC; FPGA; LSA organization; Linear Sequential Array organization; clock cycle time; constant fan-out; critical path delay; data dependencies; experimental data; online divider design; operand precision; pipelined architecture; radix-2 online division; Application software; Application specific integrated circuits; Broadcasting; Clocks; Degradation; Delay effects; Digital arithmetic; Digital filters; Field programmable gate arrays; Measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Arithmetic, 2001. Proceedings. 15th IEEE Symposium on
Conference_Location :
Vail, CO
ISSN :
1063-6889
Print_ISBN :
0-7695-1150-3
Type :
conf
DOI :
10.1109/ARITH.2001.930128
Filename :
930128
Link To Document :
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