• DocumentCode
    3195321
  • Title

    A digital pulse width modulator based on pulse shrinking mechanism

  • Author

    Chen, Poki ; Chen, Tuo-Kuang ; Hu, Hsiao-Tzu ; Peng, Yu-Han ; Chen, Yi-Jin

  • Author_Institution
    Dept. of Electron. Eng., Nat. Taiwan Univ. of Sci. & Technol., Taipei, Taiwan
  • fYear
    2009
  • fDate
    2-5 Nov. 2009
  • Firstpage
    833
  • Lastpage
    836
  • Abstract
    The first digital pulse width modulator based on pulse shrinking mechanism is proposed in this paper. With extremely simple structure, the operation frequency can reach 17 MHz and the chip size is 0.39 mm2 only in a TSMC 0.35 ¿m CMOS process. Under 8-bit realization, the integral nonlinearity is measured to be -0.6~+0.45% which is the smallest ever known.
  • Keywords
    CMOS integrated circuits; pulse width modulation; TSMC CMOS process; digital pulse width modulator; frequency 17 MHz; integral nonlinearity; pulse shrinking mechanism; realization; size 0.35 mum; storage capacity 18 bit; Counting circuits; Delay lines; Digital modulation; Frequency; Propagation delay; Pulse circuits; Pulse generation; Pulse width modulation; Space vector pulse width modulation; Voltage control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Electronics and Drive Systems, 2009. PEDS 2009. International Conference on
  • Conference_Location
    Taipei
  • Print_ISBN
    978-1-4244-4166-2
  • Electronic_ISBN
    978-1-4244-4167-9
  • Type

    conf

  • DOI
    10.1109/PEDS.2009.5385803
  • Filename
    5385803
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3195321