Title :
Viterbi detector architecture for high speed optical storage
Author :
Choi, Sung Han ; Kong, Jun Jin ; Chung, Byung Good ; Kim, Yong Hwan
Author_Institution :
ASIC Center, Samsung Electron. Co. Ltd, South Korea
Abstract :
We describe the architecture of a Viterbi detector in a partial response maximum likelihood (PRML) system of high speed optical storage. In the high speed optical system (CDROM 30× or DVD ROM/RAM 4.5×), the analog signal from an optical pick-up is far from an ideal response. We have regarded it as an intersymbol interference (ISI) and solve this problem with the PRML system including a Viterbi detector. Eight-to-fourteen modulation (EFM) and EFM+ code used in the DVD or CDROM, have a run length limited (RLL) characteristic, and its trellis diagram is different from the ordinary one. Several states and branches can be deleted. The Viterbi detector is designed for a 5 bit A/D converter up to a 120 MHz clock speed. A register exchange structure and a special overflow control logic are used for a high speed continuous input data stream.
Keywords :
CD-ROMs; 120 MHz; 5 bit; A/D converter; CDROM; DVD ROM/RAM; EFM; EFM+ code; ISI; PRML; Viterbi detector architecture; analog signal; clock speed; eight-to-fourteen modulation; high speed continuous input data stream; high speed optical storage; high speed optical system; intersymbol interference; optical pick-up; overflow control logic; partial response maximum likelihood system; register exchange structure; run length limited characteristic; Clocks; DVD; Detectors; High speed optical techniques; Intersymbol interference; Maximum likelihood detection; Modulation coding; Optical modulation; Read only memory; Viterbi algorithm;
Conference_Titel :
TENCON '97. IEEE Region 10 Annual Conference. Speech and Image Technologies for Computing and Telecommunications., Proceedings of IEEE
Conference_Location :
Brisbane, Qld., Australia
Print_ISBN :
0-7803-4365-4
DOI :
10.1109/TENCON.1997.647265