Title :
Using IBIS-AMI models to study clock recovery loop performance
Author :
Katz, Barry ; Steinberger, Martin
Author_Institution :
SiSoft, Maynard, MA, USA
Abstract :
Clock recovery loop behavior can seriously affect the performance of a high speed serial channel, and yet very little definitive data is available on the performance of the clock recovery loops in SerDes macros. This paper introduces a method for extracting the jitter transfer function and pattern dependent jitter from an IBIS-AMI model under realistic channel conditions, and presents example results from a generic bang-bang clock recovery design and seven commercial SerDes designs.
Keywords :
high-speed integrated circuits; integrated circuit design; integrated circuit noise; jitter; synchronisation; transfer functions; I/O buffer information specification; IBIS-AMI model; SerDes design; SerDes macro; algorithmic modeling interface; bang-bang clock recovery design; clock recovery loop behavior; clock recovery loop performance; high speed serial channel; jitter transfer function; pattern dependent jitter; Arrays; Bandwidth; Clocks; Jitter; Phase noise; Timing; Transfer functions; Clock Recovery; High Speed Serial Channels; IBIS-AMI Modeling; Jitter Analysis; Performance Analysis;
Conference_Titel :
Electrical Performance of Electronic Packaging and Systems (EPEPS), 2010 IEEE 19th Conference on
Conference_Location :
Austin, TX
Print_ISBN :
978-1-4244-6865-2
Electronic_ISBN :
978-1-4244-6866-9
DOI :
10.1109/EPEPS.2010.5642790
