Title : 
Modellization of the breakdown voltage of four-layer punch-through TVS diodes
         
        
            Author : 
Urresti, J. ; Hidalgo, S. ; Flores, D. ; Roig, J. ; Vellvehi, M. ; Rebollo, J.
         
        
            Author_Institution : 
CNM-CSIC, Bellaterra, Spain
         
        
        
        
        
        
            Abstract : 
A quasi-analytical model addressed to predict the breakdown voltage in four-layer TVs diodes with Gaussian epitaxial profile is developed for the first time in this work. The model yields the breakdown voltage value in terms of technological and/or geometrical device parameters, being suitable for cases where the punch-through takes place before the avalanche breakdown. For breakdown voltages in excess of 3 V, a closed form expression can be inferred, simplifying the quasianalytical model. In addition, the existent three-layer structure model is obtained when proper boundaries are included in the proposed model. Analytical results are in satisfactory agreement with the simulation and experimental data.
         
        
            Keywords : 
avalanche breakdown; leakage currents; power semiconductor devices; semiconductor device breakdown; semiconductor device models; semiconductor device reliability; 3 V; Gaussian epitaxial profile; avalanche breakdown; breakdown voltage; breakdown voltages; existent three-layer structure model; four-layer punch-through TVS diodes; geometrical device parameters; quasi-analytical model; technological device parameters; Analytical models; Avalanche breakdown; Breakdown voltage; Diodes; Electrostatic discharge; Poisson equations; Protection; Semiconductor process modeling; Solid modeling; Very large scale integration;
         
        
        
        
            Conference_Titel : 
Microelectronics, 2004. 24th International Conference on
         
        
            Print_ISBN : 
0-7803-8166-1
         
        
        
            DOI : 
10.1109/ICMEL.2004.1314580