Title :
Routability between two modules by dummy modules insertion based on B*-trees
Author :
Li, Kang ; Yu, Juebang ; YongBingYu ; Liao, Yong ; Li, Fan ; Fu, Qingyun
Author_Institution :
Sch. of Electron. Eng., Univ. of Electron. & Sci. Technol. of China, Chengdu
Abstract :
It is often the truth that most of design had been finished besides one or two of routing was failed or emergent requirement of additional interconnection of two special modules occurred lately in VLSI design process. In such situations, it is wise to mend the flaws rather than to repeat whole design process from the very beginning. To solve such little amendment of interconnection, insertion of dummy modules are proposed to connect two specially designated modules based on B*-tree representation. Depending on parent-son relationships of nodes in a B*-tree and geometric relationships between corresponding modules in the placement, it is easy to insert some hypothetical empty modules to connect any two modules. Corresponding modification of B*-tree is also discussed in the paper.
Keywords :
VLSI; binary codes; integrated circuit design; integrated circuit interconnections; network routing; tree codes; trees (mathematics); B*-tree coding scheme; VLSI design process; binary tree; circuit interconnection; circuit routing; dummy module insertion; flaw mending; geometric relationships; parent-son relationships; Compaction; Computer science; Crosstalk; Integrated circuit interconnections; Logic design; Packaging; Process design; Productivity; Routing; Very large scale integration;
Conference_Titel :
Communications, Circuits and Systems, 2008. ICCCAS 2008. International Conference on
Conference_Location :
Fujian
Print_ISBN :
978-1-4244-2063-6
Electronic_ISBN :
978-1-4244-2064-3
DOI :
10.1109/ICCCAS.2008.4658017