Title :
Design and implementation of Reconfigurable Stream Processor in multimedia applications
Author :
Xiao, Yu ; Liu, Leibo ; Wei, Shaojun
Author_Institution :
Inst. of Microelectron., Tsinghua Univ., Beijing
Abstract :
This paper proposed a Reconfigurable Stream Processor applied in multimedia applications. Based on the unique parallel stream processing framework and optimized algorithm mapping method, the reconfigurable processor exploits the parallelism of complex algorithms and provides a high flexibility during run-time to adapt to various applications. The architecture of processor is implemented and verified on the development board of ARM926EJS plus Xilinx Virtex-4XC4VLX80. A H.264 video codec is implemented to verify the reconfigurable architecture, achieving 58%~130% speed boost compared with traditional reconfigurable architectures such as MorphoSys and PACT.
Keywords :
parallel architectures; reconfigurable architectures; ARM926EJS; Xilinx Virtex-4XC4VLX80; complex algorithms parallelism; parallel stream processing framework; processor architecture; reconfigurable architecture; reconfigurable stream processor; Algorithm design and analysis; Computer aided instruction; Computer architecture; Concurrent computing; Hardware; High performance computing; Multimedia computing; Parallel processing; Reconfigurable architectures; Streaming media;
Conference_Titel :
Communications, Circuits and Systems, 2008. ICCCAS 2008. International Conference on
Conference_Location :
Fujian
Print_ISBN :
978-1-4244-2063-6
Electronic_ISBN :
978-1-4244-2064-3
DOI :
10.1109/ICCCAS.2008.4658024
