DocumentCode :
3196892
Title :
Determination of maximum strength and optimization of LED chip structure
Author :
Yang, Shin-Yueh ; Chou, Tsung-Lin ; Huang, Chien-Fu ; Wu, Chung-Jung ; Hsu, Chia-Liang ; Chiang, Kuo-Ning
Author_Institution :
Dept. of Power Mech. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
fYear :
2010
fDate :
13-16 Sept. 2010
Firstpage :
1
Lastpage :
5
Abstract :
High-power light emitting diodes (LEDs) are found in a number of applications in high-volume consumer markets, such as illumination, signalling, screen backlights, automotives, and others, because of the numerous advantages of LEDs, including low power cost, long life span, and high efficiency. During the manufacturing process, the high-power LED chips are subjected to mechanical and thermal loadings. Wire bonding is one of the major processes in the LED packaging process that provide electrical interconnection between the bonding pad and the lead. However, due to bad parameter setup in a wire bonder, the LED will crack and the pad will peel after wire bonding. In this study, the strength of LED is determined for the design requirement in order to ensure good reliability of wire bonding. Point-load test (PLT) and focused ion beam (FIB) are used to determine the maximum allowable force the epilayer can withstand, which is approximately 75 g. By combining the finite element method and experimental data, a useful design tool to confirm LED die strength is provided. Finite element results of contact analysis show that the stress concentration area is located on the edge of the pin and maximum stress (227 MPa) occurs in the epilayer. Parametric study is employed to find ways to reduce stress in LED layer. The results indicate that increasing pad thickness is the major factor that can reduce stress and enhance LED die strength. PLT and FIB experiments are also performed to confirm simulation results.
Keywords :
electronics packaging; finite element analysis; focused ion beam technology; lead bonding; light emitting diodes; optimisation; FIB; LED chip structure; LED die strength; LED packaging process; PLT; contact analysis; electrical interconnection; finite element method; focused ion beam; high-power LED chips; high-power light emitting diodes; high-volume consumer markets; manufacturing process; maximum strength; mechanical loadings; optimization; point-load test; stress concentration; thermal loadings; wire bonding; Bonding; Facsimile; Light emitting diodes; Materials reliability; Mirrors; Packaging; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic System-Integration Technology Conference (ESTC), 2010 3rd
Conference_Location :
Berlin
Print_ISBN :
978-1-4244-8553-6
Electronic_ISBN :
978-1-4244-8554-3
Type :
conf
DOI :
10.1109/ESTC.2010.5642840
Filename :
5642840
Link To Document :
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