DocumentCode :
31975
Title :
A Time-Domain High-Order MASH \\Delta \\Sigma ADC Using Voltage-Controlled Gated-Ring Oscillator
Author :
Yu, Weimin ; Kim, Jung-Ho ; Kim, Kunsu ; Cho, Sangyeun
Author_Institution :
Department of Electrical Engineering, KAIST, Daejeon, Republic of Korea
Volume :
60
Issue :
4
fYear :
2013
fDate :
Apr-13
Firstpage :
856
Lastpage :
866
Abstract :
In this paper, a time-domain high-order \\Delta \\Sigma analog-to-digital converter (ADC) using voltage-controlled gated-ring oscillator (VC-GRO) and time-domain multi-stage-noise-shaping (MASH) is introduced. To implement the high-order noise transfer function (NTF), a voltage-controlled oscillator (VCO) and VC-GRO quantizers are cascaded. Unlike conventional high-order \\Delta \\Sigma ADC using feedback loop, the proposed ADC has advantages that the architecture is open-loop and the quantizer resolution depends on the time resolution, thus making it attractive for deep submicron CMOS process. The performance of the proposed ADC is theoretically analyzed and simulated, including non-ideal conditions such as nonlinearity, mismatch, propagation delay of logic gates, phase noise, and sampling clock jitter.
Keywords :
Logic gates; Modulation; Multi-stage noise shaping; Quantization; Time domain analysis; Voltage-controlled oscillators; Analog-to-digital; analog-to-digital converter (ADC); delta-sigma; gated-ring oscillator (GRO); multi-stage- noise-shaping (MASH); noise shaping; nonidealities; oversampling; time-domain; voltage-controlled gated-ring oscillator (VC-GRO); voltage-controlled oscillator (VCO);
fLanguage :
English
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-8328
Type :
jour
DOI :
10.1109/TCSI.2012.2209298
Filename :
6266713
Link To Document :
بازگشت